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System-on-Chip Design and Technologies

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Low-Power NoC for High-Performance SoC Design

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Low-Power NoC for High-Performance SoC Design

Citation Information

Low-Power NoC for High-Performance SoC Design

Hoi-Jun Yoo , Kangmin Lee , and Jun Kyoung Kim

CRC Press 2008

Print ISBN: 978-1-4200-5172-8

eBook ISBN: 978-1-4200-5173-5

Table of Contents

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http://dx.doi.org/10.1201/9781420051735

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Title
xiii
Authors

Abstract - Hi-Res PDF (591 KB) - PDF w/links (592 KB)
3
Chapter 1. NoC and System-Level Design

Abstract - Hi-Res PDF (5713 KB) - PDF w/links (3844 KB)
47
Chapter 2. System Design with Model of Computation

Abstract - Hi-Res PDF (1440 KB) - PDF w/links (1445 KB)
73
Chapter 3. Hardware/Software Codesign

Abstract - Hi-Res PDF (2268 KB) - PDF w/links (2275 KB)
101
Chapter 4. Computation‚ÄìCommunication Partitioning

Abstract - Hi-Res PDF (1685 KB) - PDF w/links (1688 KB)
131
Chapter 5. Network on Chip-Based SoC

Abstract - Hi-Res PDF (2140 KB) - PDF w/links (1270 KB)
157
Chapter 6. NoC Topology and Protocol Design

Abstract - Hi-Res PDF (2122 KB) - PDF w/links (2124 KB)
189
Chapter 7. Low-Power Design for NoC

Abstract - Hi-Res PDF (2197 KB) - PDF w/links (1543 KB)
217
Chapter 8. Real Chip Implementation

Abstract - Hi-Res PDF (3525 KB) - PDF w/links (2197 KB)
261
Appendix

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