Register
Log In
Home
Browse Content
Advanced Search
About CRCnetBASE
Subject Collections
How to Subscribe
Librarian Resources
News & Events
Free Trial
Search
Download to Citation Mgr
View Abstracts
Add to Bookshelf
Email
Front MatterAbstract - Hi-Res PDF (784 KB) - PDF w/links (725 KB)
Chapter 1. OverviewAbstract - Hi-Res PDF (537 KB) - PDF w/links (538 KB)
Chapter 2. The Integrated Circuit Design Process and Electronic Design AutomationRobert Damiano, Raul CamposanoAbstract - Hi-Res PDF (2283 KB) - PDF w/links (1237 KB)
Chapter 3. Tools and Methodologies for System-Level DesignShuvra Bhattacharyya, Wayne WolfAbstract - Hi-Res PDF (2023 KB) - PDF w/links (748 KB)
Chapter 4. System-Level Specification and Modeling LanguagesJoseph T. BuckAbstract - Hi-Res PDF (623 KB) - PDF w/links (632 KB)
Chapter 5. SoC Block-Based Design and IP AssemblyJohn WilsonAbstract - Hi-Res PDF (465 KB) - PDF w/links (466 KB)
Chapter 6. Performance Evaluation Methods for Multiprocessor System-on-Chip DesignAhmed Jerraya, Iuliana BacivarovAbstract - Hi-Res PDF (814 KB) - PDF w/links (819 KB)
Chapter 7. System-Level Power ManagementEnrico Macii, Vivek Tiwari, Massimo Poncino, Naehyuck ChangAbstract - Hi-Res PDF (782 KB) - PDF w/links (793 KB)
Chapter 8. Processor Modeling and Design ToolsPrabhat Mishra, Nikil DuttAbstract - Hi-Res PDF (792 KB) - PDF w/links (798 KB)
Chapter 9. Embedded Software Modeling and DesignMarco Di NataleAbstract - Hi-Res PDF (1744 KB) - PDF w/links (1756 KB)
Chapter 10. Using Performance Metrics to Select Microprocessor Cores for IC DesignsSteve LeibsonAbstract - Hi-Res PDF (3320 KB) - PDF w/links (1043 KB)
Chapter 11. Parallelizing High-Level SynthesisSumit Gupta, Gaurav Singh, Rajesh Gupta, Sandeep ShuklaAbstract - Hi-Res PDF (770 KB) - PDF w/links (788 KB)
Chapter 12. Cycle-Accurate System-Level Modeling and Performance EvaluationMarcello Coppola, Miltos D. GrammatikakisAbstract - Hi-Res PDF (690 KB) - PDF w/links (700 KB)
Chapter 13. Micro-Architectural Power Estimation and OptimizationEnrico Macii, Massimo Poncino, Renu MehraAbstract - Hi-Res PDF (1824 KB) - PDF w/links (1846 KB)
Chapter 14. Design PlanningRalph H.J.M. OttenAbstract - Hi-Res PDF (937 KB) - PDF w/links (943 KB)
Chapter 15. Design and Verification LanguagesStephen A. EdwardsAbstract - Hi-Res PDF (2157 KB) - PDF w/links (2162 KB)
Chapter 16. Digital SimulationJohn SanguinettiAbstract - Hi-Res PDF (581 KB) - PDF w/links (583 KB)
Chapter 17. Using Transactional-Level Models in an SoC Design FlowAlain Clouard, Laurent Maillet-Contoz, Jean-Philippe Strassen, Frank GhenassiaAbstract - Hi-Res PDF (1325 KB) - PDF w/links (1326 KB)
Chapter 18. Assertion-Based VerificationErich Marschner, Harry FosterAbstract - Hi-Res PDF (735 KB) - PDF w/links (736 KB)
Chapter 19. Hardware Acceleration and EmulationMike Bershteyn, Ray TurnerAbstract - Hi-Res PDF (1793 KB) - PDF w/links (1029 KB)
Chapter 20. Formal Property VerificationKen McMillan, Limor FixAbstract - Hi-Res PDF (540 KB) - PDF w/links (550 KB)
Chapter 21. Design-For-TestBernd KoenemannAbstract - Hi-Res PDF (1080 KB) - PDF w/links (1087 KB)
Chapter 22. Automatic Test Pattern GenerationLi-C. Wang, Kwang-Ting (Tim) ChengAbstract - Hi-Res PDF (1040 KB) - PDF w/links (1061 KB)
Chapter 23. Analog and Mixed Signal TestBozena KaminskaAbstract - Hi-Res PDF (1276 KB) - PDF w/links (1286 KB)
